I am in the process of converting traditional verilog test benches to
SystemVerilog UVM test benches. As per the UVM methodology, it is recommended to
`uvm_info instead of
$display statements so that the
encodes a Message ID and Message Verbosity along with the message required
to be printed.
I won’t go in more detail about UVM and verilog as this post is about how I can save a macro that I use very frequently into an elisp function.